Ph.D / MS (DSP, Embedded Systems. etc) with 5 years of relevant experience, preferably in research, design and development of DSP systems.
He/She will be responsible for conducting the research, design and development activities for GP-SAR, under the guidance and as assigned by the Project Manager.
ROLE AND RESPONSIBILITIES
The main role of the engineer will be to build solutions for Lab View FPGA based applications using NI USRPs/Flex Rios. The position requires knowledge of Lab View Development Environment and Lab View FPGA but the individual must have sharp problem solving skills. The engineer will be working under a team of professionals who will provide guidance and necessary training. With FPGA design engineer responsibilities, an individual can make a good progression in your occupation.
- Responsible for performing the LabView FPGA coding procedures including the FPGA enforcement processes
- Developing model based designing methods with the help of Simulink or Matlab framework and representation.
- To perform the work of manifold segmentation of LabView FPGA designs
QUALIFICATIONS AND EDUCATION REQUIREMENTS
Bachelors in Electrical / Electronic Engineering with a minimum CGPA of 3 preferably from reputed inland / foreign institute.
- LabVIEW Certification (CLD, CLAD, CLA)
- LabVIEW Real‐Time and LabVIEW FPGA
- Familiarity with PXI, cRIO, or cDAQ
- Signal Processing Experience
- 0‐2 Years in the field of LabView FPGA design using Software Defined Radios
- The hired engineer will undergo a 2‐3 month training period during which the engineer will be on probation. The final appointment will be confirmed after completion of the training period.
- Pakistani Diaspora is highly encouraged to apply.
- Incomplete applications and applications with fake/false documents will be rejected at any stage during or after recruitment process.
- Only shortlisted candidates will be invited for interview and written test. No TA/DA will be admissible for test /interview.
- The Organization reserves the right to withdraw/cancel the vacancies at any stage without assigning any reason.